| Role | Location |
|---|---|
| Senior/ Staff Formal Verification Engineer | Tel Aviv-Yafo, Israel |
| Technical Lead Digital Design Engineer | San Jose, CA |
| Senior Principal Digital Design Engineer | San Jose, CA |
| Principal Digital Design Engineer | San Jose, CA |
| System Validation Engineer (Various Levels) | Vancouver, Canada |
| Sales Intern | Taipei, Taiwan |
| Field Application Engineering Intern | Taipei, Taiwan |
| IP Design Verification Director | Bengaluru, India |
| Principal Signal and Power Integrity Engineer | San Jose, CA |
| Distinguished Formal Verification | San Jose, CA |
| Expert IC Package Design Lead | Israel |
| Senior Director System Validation Engineer | San Jose, CA |
| Principal Silicon Validation Engineer, SerDes/PAM4 | San Jose, CA |
| Lead Firmware QA Engineer | Bangalore, India |
| Technical Lead Physical Design Engineer | San Jose, CA |
| Senior Emulation Engineer | Israel |
| Senior/ Staff Physical Design Engineer | Haifa District, Israel |
| Senior ASIC Design Engineer | Israel |
| DFT Engineer | Tel Aviv-Yafo, Israel |
| Principal Supplier Quality Engineer | Taipei, Taiwan |
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