Experienced Engineer - ASIC Design
Chennai, IndiaPosted Jul 13, 2026
## Join our Team
About this opportunity:
We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digitalASICs of tomorrow's mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobilenetworks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport – to enablecommunication service providers to surpass the expectations of their end-customers. At our state-of-the-art designcenters, we don't just follow industry trends—we set them. By leveraging cutting-edge tools and methodologies, welead innovation in the telecommunications sector. As a valued team member, you'll play a pivotal role in shaping thefuture of global connectivity, contributing to the advancement of 5G and 6G technologies.
As part of our global R&D organization, you'll collaborate with talented teams across Sweden, the US, and beyond.We are committed to fostering a collaborative and innovative work environment that encourages creativity andteamwork.
Creative Freedom: Immerse yourself in an environment that champions innovation and critical thinking. You'll havethe opportunity to explore advanced design technologies alongside skilled experts.
Global Impact: Contribute to projects with far-reaching impacts, transforming industries, advancing digitaleconomies, and enhancing communication worldwide.
Work-Life Balance: We prioritize the well-being of our team members, offering a balanced work-life environment tohelp you excel professionally without compromising your personal life.
Professional Growth: Engage in continuous learning opportunities, tackle exciting challenges, and collaborate withbrilliant minds in a supportive and forward-thinking atmosphere.
An international work environment with opportunities for professional growth and development.
A collaborative and inclusive culture that values diversity and innovation.
## You will do:
* Develop ASIC IP blocks and subsystems, contributing to the advancement of 5G and 6G communicationtechnology.
* Develop part of a design, whether at the block or subsystem level.
* Generate comprehensive documentation throughout the design lifecycle.
* Perform digital design and conduct all RTL sign-off checks.
* Continuously enhance and optimize design methodologies and processes.
* Collaborate with IP Architects to break down requirements and create detailed IP architecture and designspecifications.
* Work closely with verification engineers to review and refine verification plans.
* Build competence in the technical domain.
* Engage in cross-team collaboration to ensure successful project delivery.
## You will bring:
Required Qualifications:
* Bachelor’s degree in electrical or computer engineering.
* 5+ years industry experience in ASIC IP Design.
* Experience in/with:
* Understanding of ASIC technology, design environments, and methodologies.
* SystemVerilog
* RTL static sign-off tools such as SpyGlass.
* Scripting languages like TCL, Python, or similar.
* AMBA-based designs such as AXI and CHI.
* SystemVerilog Assertions.
Additional Requirements:
* Experience with Cadence and Synopsys front-end and middle-end design suites.
* Team-oriented, prioritizing team success within the team, across teams, and across sites over individualresults. Specifically, experienced at communicating and meeting expectations within and across teams inan agile environment.
* High attention to detail and commitment to quality.
* Strong focus on meeting project deadlines and deliverables.
* Proficient in English, with strong communication skills.
Preferred Skills:
* Understanding of radio access systems and their components.
* Expertise in low-power design, including specifying power intent using UPF or similar standards.
* Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysisenvironments (e.g., Simscope), issue-tracking (e.g., Jira).
* Experience designing one or more...