Role responsibilities
Develop and maintain high-performance C++ models of Arm's Interconnect IP for system-level simulation and validation. Collaborate with architects and hardware engineers to model next-generation hardware and integrate software on Arm Virtual Platforms.
Requirements
Requires strong C++ development skills and a deep understanding of computer architecture concepts like memory hierarchy and interconnects. Candidates must demonstrate the ability to lead complex technical work and handle ambiguity with sound engineering judgment.
Key skills
C++, Computer Architecture, Memory Hierarchy, Interconnects, System-level Simulation, SystemC, TLM, QEMU, Simics, Gem5, Virtualizer, Firmware Development, Device-driver Development, Software Modeling, Technical Leadership, Collaboration
Keywords
C++, Computer Architecture, Interconnect IP, System-level Simulation, Arm Virtual Platforms, IoT, Cloud Computing, AI, SystemC, TLM, QEMU, Simics, Gem5, Virtualizer, Firmware, Device Drivers, SoC Virtual Prototyping, Micro-architectural Modeling, Linux, Android, Semiconductor Manufacturing, Software Development, Hardware Manufacturing, Memory Bus Transactions, Functional Models