Senior Director, IP and Custom Circuits Development

Lead and manage Custom IPs like High speed D2D, SRAMs, Register Files and other differentiating IP development team Initiatives to strengthen the team and attract talents Identify opportunities to develop new differentiating IPs for the SoC teams Strategize on build vs buy on IPs Close interaction with senior experts of SoC design and architecture teams on IP definitions Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 7+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 10+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience. OR Equivalent Experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. 17+ years of experience in leading High-Speed Serial and/or Parallel IO architecture and design with BSEE or 15+ years of experience in the same with MSEE in Electrical Engineering Experience in leading large cross-site organizations Familiarity with SRAM and/or Register File designs Experience with test Chip developments with Mixed-signal IPs Experience in Program management of Complex IP developments Experience in ensuring quality of complex analog/custom circuit IP developments Experience in all aspects of Mixed-signal IP verifications and post-silicon characterizations