Drive High-Performance AI Silicon Architecture direction Develop Silicon Architecture Specifications for AI Accelerator Develop functional and analytical models of silicon IP blocks Collaborate with AI Software and Hardware teams to drive the optimum silicon architecture for current and future AI Models Support and guide Design, DV, Emulation, Firmware, and Kernel development teams through End-to-End Silicon development cycle Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 7+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 10+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. 10+ years of silicon architecture experience Proven experience leading at least three end-to-end silicon programs through architecture, design, tape-out, bring-up, validation, and production readiness Demonstrated ability to drive cross-functional collaboration across architecture, design, software, firmware, verification, product engineering, and system teams. Deep understanding of current and emerging machine learning models and workloads for both training and inference Recognized expertise in one or more of the following domains Machine learning acceleration, including large-scale matrix multiplication, numerical formats and representations, parallel computing, and performance optimization. SIMD/SIMT vector processor architecture and microarchitecture Scalable high-bandwidth Network-on-Chip (NoC) architectures and interconnect fabrics Memory subsystem architecture, including HBM and high-bandwidth data movement. Experience driving hardware/software co-design for AI and high-performance computing systems Experience with high-power, large-scale SoC, and multi-chiplet architectures System-level architectural thinking with the ability to balance performance, power, area, cost, and time-to-market tradeoffs Experience defining and delivering AI accelerator, GPU, CPU, networking, or other high-performance silicon products
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