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Logic Design Engineer

BITMAIN
SingaporeHardware Engineer, Mechanical EngineerPosted Aug 4, 2026
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Logic Design Engineer

BITMAIN Singapore, Singapore

Logic Design Engineer

BITMAIN Singapore, Singapore 18 hours ago Be among the first 25 applicants

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孙仁壮

孙仁壮

Human Resources Specialist @ Bitmain | MBA, International Recruitment

Responsibility

1. Participate in chip product specification definition, including algorithm analysis and module-level specification development; 2. Implement and verify digital circuits at the RTL level, performing power, performance, and area (PPA) optimization; 3. Conduct digital circuit synthesis, timing analysis, and related design tasks.

Requirement

1. Experience in developing algorithm-based digital circuits; candidates with experience in PPA optimization, complex IP design, or ultra-low-power circuit design are preferred;

2. Proficient in Verilog or SystemVerilog, and skilled in using scripting languages such as C, Tcl, Shell, Perl, or Python;

3. Familiar with SDC constraint writing and Netlist ECO flows; proficient with EDA tools such as VCS, Verdi, DC, Formality, and SpyGlass; knowledge of PT tool usage or UVM verification methodology is a plus.

  • Seniority level

    Not Applicable

  • Employment type

    Full-time

  • Job function

    Engineering

  • Industries

    Semiconductor Manufacturing and Computers and Electronics Manufacturing

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